| 摘要 |
A dynamic memory refresh controller, a semiconductor memory system having the same, and a method of controlling refresh of a dynamic memory are provided to reduce power consumption of the system by maximizing a refresh trigger period. An FIFO memory(210) stores a request from a master device and processes the request. A scheduler(220) rearranges the request within the FIFO(First Input First Output) memory according to priorities of the respective master devices or provides information on a subsequent request. A refresh controller(230) determines a refresh timing of a dynamic memory based on an existence of the subsequent request within the FIFO memory and an idle state of the banks in the dynamic memory. A signal generator(240) generates a refresh trigger signal for refreshing the dynamic memory in response to an output control signal from the refresh controller. The refresh controller includes an FSM(Finite State Machine,232) and a tREF counter(234). The tREF counter determines a refresh period of the dynamic memory.
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