发明名称 Method of fabricating the trench isolation layer in semiconductor device
摘要 A method for forming a trench isolation layer in a semiconductor device is provided to lessen the convergence of an electric field by obtaining a round profile from an upper corner of a semiconductor substrate adjacent to a moat portion of the trench isolation layer using a planarizing process and a dry oxidation under oxygen gas atmosphere. An isolation trench(402) is formed on a semiconductor substrate(400) by an etching process using a hard mask pattern. A sidewall oxide layer(420) is formed in the trench. A liner nitride layer(430) is formed along an upper surface of the resultant structure. A buried insulating layer(440) for filling the trench is formed on the liner nitride layer. A planarizing process is performed on the buried insulating layer to expose the hard mask pattern to the outside. A dry oxidation is performed on the resultant structure by using oxygen gas. Then, the hard mask pattern is removed therefrom.
申请公布号 KR100700284(B1) 申请公布日期 2007.03.26
申请号 KR20050131500 申请日期 2005.12.28
申请人 发明人
分类号 H01L21/76 主分类号 H01L21/76
代理机构 代理人
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