| 摘要 |
A leadless package and method for manufacturing silicon based leadless QFN/SON compatible packages are described. In addition the package allows for hermetic sealing of devices while maintaining electrical and optical access. Micro-vias with feed-through metallization through a silicon structure facilitates a surface mount technology-compatible silicon package with bottom SMT pads and top surface device integration. Sloped edges on the SMT side enable solder filleting for post solder inspection. Hermetic seal can be attained for example using anodic bonding of a glass lid or using metal soldering. Metal soldering enables the use of solder bumps to provide electrical connections for the package to the lid with integrated device functionality used for sealing. Hermetically sealed silicon packages eliminates the need for an extra packaging layer required in plastic packages and provides a standard interface for enclosing one or more discrete devices.
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