发明名称 Scheme for determining internal mode using MCLK frequency autodetect
摘要 A method of determining an internal operating mode of an electronic circuit derives multiple comparison rates from a rate of a master clock input, computes one or more clock ratios of the comparison rates to a rate of a sample rate clock input, and determines whether any of the clock ratios is a valid ratio representing a supported clock configuration. The appropriate internal operating mode is then selected based on the valid ratio. In the illustrative embodiment, a clock autodetect unit uses two trip frequencies to derive at least first and second clock comparison rates. The audio converter can operate in three distinct modes (base, high and quad modes). The base mode is selected when the clock ratio is about 256, the high mode is selected when the clock ratio is about 128, and the quad mode is selected when the clock ratio is about 64. A multiplexer can be used to sequence through the computer clock ratios to ensure that a highest valid ratio is used among a plurality of valid ratios.
申请公布号 US7193549(B1) 申请公布日期 2007.03.20
申请号 US20040891944 申请日期 2004.07.15
申请人 CIRRUS LOGIC, INC. 发明人 NANDA KARTIK;RANGAN GIRI;AMAR ARYESH
分类号 H03M1/66 主分类号 H03M1/66
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