| 摘要 |
The mirror (10) has mirror transistors (Q1, Q2) inserted between supply voltage and ground (Vcc, GND) and respectively connected to input and output terminals (IN, OUT). A base current compensation block (12) has a bias current generator (G2) of a bias current (Ipol) and a compensation transistor (Q4) inserted between the supply voltage and the terminal (IN). A compensation transistor (Q6) is inserted between the supply voltage and common control terminals of the mirror transistors and has a control terminal connected to a control terminal of the transistor (Q4). |
