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发明名称
Tolerant input/output circuit being free from ESD voltage
摘要
申请公布号
KR100688531(B1)
申请公布日期
2007.03.02
申请号
KR20050011914
申请日期
2005.02.14
申请人
发明人
分类号
H03K19/0185
主分类号
H03K19/0185
代理机构
代理人
主权项
地址
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