SYSTEM FOR INTELLECTUAL PROPERTY REUSE IN INTEGRATED CIRCUIT DESIGN,申请号EP20010952203-传众专利搜索

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发明名称	SYSTEM FOR INTELLECTUAL PROPERTY REUSE IN INTEGRATED CIRCUIT DESIGN
摘要
申请公布号	EP1295212(A4)	申请公布日期	2007.02.28
申请号	EP20010952203	申请日期	2001.06.21
申请人	MENTOR GRAPHICS CORPORATION	发明人	GARNER, ROBERT, E.;GARDNER, DAVID, N.;JUSSEL, JEFFREY;ELMAN, ANNA;LING, DAVID;BENAVIDES, ALVARO, EDUARDO;MCADAMS, MARK, A.
分类号	G06F17/50;(IPC1-7):G06F15/18	主分类号	G06F17/50
代理机构		代理人
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地址

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