摘要 |
A re-configurable, streaming vector processor ( 100 ) is provided which includes a number of function units ( 102 ), each having one or more inputs for receiving data values and an output for providing a data value, a re-configurable interconnection switch ( 104 ) and a micro-sequencer ( 118 ). The re-configurable interconnection switch ( 104 ) includes one or more links, each link operable to couple an output of a function unit ( 102 ) to an input of a function unit ( 102 ) as directed by the micro-sequencer ( 118 ). The vector processor may also include one or more input-stream units ( 122 ) for retrieving data from memory. Each input-stream unit is directed by a host processor and has a defined interface ( 116 ) to the host processor. The vector processor also includes one or more output-stream units ( 124 ) for writing data to memory or to the host processor. The defined interface of the input-stream and output-stream units forms a first part of the programming model. The instructions stored in a memory, in the sequence that direct the re-configurable interconnection switch, form a second part of the programming model. |
申请人 |
MOTOROLA, INC. |
发明人 |
MAY, PHILIP, E.;MOAT, KENT, DONALD;ESSICK, RAYMOND, B., IV;CHIRICESCU, SILVIU;LUCAS, BRIAN, GEOFFREY;NORRIS, JAMES, M.;SCHUETTE, MICHAEL, ALLEN;SAIDI, ALI |