发明名称 |
Precompensation circuit for magnetic recording |
摘要 |
In a precompensation circuit for magnetic recording of data signals, a clock produces clock signals at a predetermined rate to clock the recording of the data signals. A clock delay generator generates clock delay data relative to the generated clock signals for successive data signals to be recorded. The clock delay data for each data signal is formed according to the states of a set of adjacent data signals. n>1 programmable clock delay units operate sequentially to control the recording times of the successive data signals. Each clock delay unit receives the clock delay data for one data signal in each sequence of n successive data signals and determines recording time of the one data signal according to the clock delay data for the one data signal in the sequence.
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申请公布号 |
US7184231(B1) |
申请公布日期 |
2007.02.27 |
申请号 |
US20050250373 |
申请日期 |
2005.10.17 |
申请人 |
MARVELL INTERNATIONAL LTD. |
发明人 |
SUTARDJA PANTAS;CHENG CHI FUNG |
分类号 |
G11B5/09 |
主分类号 |
G11B5/09 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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