发明名称 Method and apparatus for improved ESD performance
摘要 The present invention provides an integrated circuit for improved ESD protection and method of forming the same. The integrated circuit comprises a substrate and an insulating layer formed over the substrate. The circuit also comprises a field effect field effect transistor (FET) formed over the insulating layer. The FET includes a well region of a first conductivity type. The circuit also includes a well resistor coupled to the FET to provide ballasting to the circuit. The well resistor includes a well region also of the first conductivity type.
申请公布号 US2007040222(A1) 申请公布日期 2007.02.22
申请号 US20060451188 申请日期 2006.06.12
申请人 VAN CAMP BENJAMIN;VERMONT GERD;KEPPENS BART 发明人 VAN CAMP BENJAMIN;VERMONT GERD;KEPPENS BART
分类号 H01L23/62 主分类号 H01L23/62
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