发明名称 Device for minimizing differential pair length mismatch and impedance discontinuities in an integrated circuit package design
摘要 A method of routing an integrated circuit package design includes steps of receiving as input at least a portion of an integrated circuit design including a differential pair of two electrical conductors, calculating a value of length mismatch between the two electrical conductors, calculating an added trace length to compensate for an impedance discontinuity of a shorter one of the two electrical conductors, and extending the shorter one of the two electrical conductors by routing the added trace length entirely inside an area surrounded by a contact pad that electrically terminates the shorter one of the two electrical conductors. The routing for the differential pair with the added trace length is generated as output in the integrated circuit design.
申请公布号 US7180011(B1) 申请公布日期 2007.02.20
申请号 US20060276938 申请日期 2006.03.17
申请人 LSI LOGIC CORPORATION 发明人 HALL JEFFREY;NIKOUKARY SHAWN
分类号 H01R13/46;H01R12/04;H05K5/00 主分类号 H01R13/46
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