| 摘要 |
<p>The invention discloses a process for determining the optimum load driving capacity for each driving node in a complex logic circuit by:
- extracting the logic equations of the logic circuit from a circuit description,
- analyzing the fan-out of each driving node to determine if the total number of pass transistor loads of the analyzed node exceeds a predetermined driving capacity;
- for each flagged node, adding logic equations representing the sum of the node's pass transistor loads,
- adding further logic equations to compare the number of pass transistors turned on from one to the absolute maximum for the node,
- using a formal proof program to analyze the logic circuit and to determine which of the comparators have a true output;
- identifying, for each flagged node, the comparator for the largest number having a possible true output to determine the highest possible actual load for the node;
- adjusting the driving capacity of the node to handle the determined highest possible actual load.</p> |
