发明名称 Manufacturing method and apparatus to avoid prototype-hold in ASIC/SOC manufacturing
摘要 A manufacturing process for LSIs uses an event tester simulator and an event tester to avoid prototype hold. In the LSI manufacturing method an LSI is designed under an EDA (electronic design automation) environment to produce design data of a designed LSI, and logic simulation is performed on a device model of the LSI design in the EDA environment with use of a testbench and producing a test vector file of an event format as a result of the logic simulation. Then, simulation data files are verified with use of the design data and the testbench by operating an event tester simulator, and a prototype LSI is produced through a fabrication provider by using the design data. The prototype LSI is tested by an event tester by using the test vector file and the simulation data files and test results is feedbacked to the EDA environment or the fabrication provider.
申请公布号 US7178115(B2) 申请公布日期 2007.02.13
申请号 US20030412143 申请日期 2003.04.11
申请人 ADVANTEST CORP. 发明人 RAJSUMAN ROCHIT;YAMOTO HIROAKI
分类号 G06F17/50;H01L21/822;G01R31/28;G01R31/317;G01R31/3183;G01R31/319;G06F19/00;H01L21/02;H01L21/82;H01L27/04;H01L27/118 主分类号 G06F17/50
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