Offset spacers for CMOS transistors

摘要

An offset spacer for CMOS transistors and a method of manufacture is provided. A gate electrode is formed on a substrate, and an offset mask layer is formed over the surface of the gate electrode and the substrate. The offset mask may be formed of an oxide layer and acts as a mask during implanting, such as pocket implants and lightly-doped drain implants. A second implant spacer may be formed on top of the offset mask layer adjacent the gate electrode, and another implant process may be performed to form deeply-doped drain regions.