Configuration of a multi-level flash memory device

摘要

A multilevel flash memory device of enhanced performance allows for a faster and more effective configuration of the operating parameters of the memory device, for performing the different functioning algorithms of the memory in the most efficient manner as possible. The identification of an optimal configuration of the operating parameters of the memory device during testing is simplified by allowing for a one-time processing of configuration bits into "algorithm-friendly" data that are stored in a purposely embedded ancillary random access memory at every power-on of the memory device by executing a specific power-on algorithm code stored in the ancillary read only memory of the embedded microprocessor. The ancillary random access memory capable of storing processed configuration data permits a further simplification and quickening of the trimming operations of the device that are performed during the testing phase of the single device being fabricated, by supporting a enhanced emulation of the many possible configurations and selectable test parameters for identifying optimal configuration and corresponding operating parameters of the memory device, before eventually conditioning (e.g. burning) the corresponding configuration fuses of the fabricated memory device.