发明名称 AUTOMATIC FREQUENCY CONTROL LOOP CIRCUIT
摘要 Provided is a frequency control loop circuit changing division ratios of a frequency synthesizer to oscillate frequencies in a broadband with high precision. The circuit comprises a clock oscillator, a frequency synthesizer, and a demodulator.
申请公布号 US2007025491(A1) 申请公布日期 2007.02.01
申请号 US20060457487 申请日期 2006.07.14
申请人 INTEGRANT TECHNOLOGIES INC. 发明人 JEONG MINSU
分类号 H03D3/24 主分类号 H03D3/24
代理机构 代理人
主权项
地址