发明名称 RADIO RECEIVER
摘要 <P>PROBLEM TO BE SOLVED: To provide a radio receiver capable of preventing generation of a reception error with low power consumption. <P>SOLUTION: An A/D converter changes a sampling timing of a reception signal x(i) in a synchronization capturing mode and a synchronization followup mode. The A/D converter generates an internal clock having a sampling frequency of eight times symbol rate by control of a clock control unit in the synchronization capturing mode. The A/D converter generates an internal clock using a symbol point and points before or after the symbol point as a sampling timing by the control of the clock control unit in the synchronization followup mode. Further, the A/D converter corrects the sample timing of the symbol point on the basis of the maximum value of a correlation value between the reception signal x(i) and a reference signal r(i), and a square of the size of correlation values before and after the maximum value in the synchronization followup mode. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007027987(A) 申请公布日期 2007.02.01
申请号 JP20050204691 申请日期 2005.07.13
申请人 SANYO ELECTRIC CO LTD 发明人 KAWAI KATSUTOSHI
分类号 H04L27/38 主分类号 H04L27/38
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