| 摘要 |
A semiconductor memory having a multitude of memory cells ( 21 - 1 ), the semiconductor memory having a substrate ( 1 ), at least one wordline ( 5 - 1 ), a first ( 15 - 1 ) and a second line ( 15 - 2; 16 - 1 ), wherein each of the multitude of memory cells ( 21 - 1 ) comprises a first doping region ( 6 ) disposed in the substrate ( 1 ), a second doping region ( 7 ) disposed in the substrate ( 1 ), a channel region ( 22 ) disposed in the substrate ( 1 ) between the first doping region ( 6 ) and the second doping region ( 7 ), a charge-trapping layer stack ( 2 ) disposed on the substrate ( 1 ), on the channel region ( 22 ), on a portion of the first doping region ( 6 ) and on a portion of the second doping region ( 7 ). Each memory cell ( 21 - 1 ) further comprises a conductive layer ( 3 ) disposed on the charge-trapping layer stack ( 2 ), wherein the conductive layer ( 3 ) is electrically floating. A dielectric layer ( 4 ) is disposed on a top surface of the conductive layer ( 3 ) and on sidewalls ( 23 ) of the conductive layer ( 3 ). The first line ( 15 - 1 ) extends along a first direction and is coupled to the first doping region ( 6 ), and the second line ( 15 - 2; 16 - 1 ) extends along the first direction and is coupled to the second doping region ( 7 ). The at least one wordline ( 5 - 1 ) extends along a second direction and is disposed on the dielectric layer ( 4 ).
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