SRAM and dual single ended bit sense for an SRAM

摘要

A CMOS static random access memory (SRAM) and a bit select for the SRAM. The bit select includes a dual single-ended sense receiving a difference signal on a bit line pair and selectively sensing signals developing on each bit line independently of the other. Single ended outputs from the dual-ended sense are provided to an output driver. The output driver provides a pair of selectively-complementary output signals.