发明名称 Semiconductor memory device
摘要 A control circuit for a row active time includes a row active signal generator for generating a row active signal in response to a row active control signal and an active command signal, wherein the row active signal has the row active time defined by the row active control; and a row active control signal generator for generating the row active control signal in response to the row active signal, wherein the row active control signal is delayed for a predetermined time at an auto refresh operation.
申请公布号 US7167948(B2) 申请公布日期 2007.01.23
申请号 US20030741630 申请日期 2003.12.18
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM IN-SOO
分类号 G06F12/16;G06F13/00;G11C11/40;G11C11/406;G11C11/4076 主分类号 G06F12/16
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