发明名称 PROCESSING OF PROGRESSIVE VIDEO SIGNALS IN DIGITAL TV RECEIVERS
摘要 A memory management process (32) for buffering progressive, interlaced, CCIR 601/656 compliant, and MPEG compliant video signals in a video memory that is partitioned into first and second buffers. The process includes identifying the format (36,44) of a received video signal, buffering the received video signal in the video memory in accordance with a standard buffering mode if the video signal is in an interlaced, CCIR 601/656 compliant, or MPEG compliant format, and buffering the received video signal in the video memory in accordance with an override buffering mode (40, 46) if the video signal is in a progressive format such as a 240p signal generated by a game console, VCR, cable text generator, and the like. <IMAGE>
申请公布号 KR100671985(B1) 申请公布日期 2007.01.19
申请号 KR20000039190 申请日期 2000.07.10
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分类号 H04N5/46;H04N5/91;H04N5/44;H04N9/64 主分类号 H04N5/46
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