| 摘要 |
<P>PROBLEM TO BE SOLVED: To restrain reduction of reliability and facilitate specification changes of a semiconductor memory device configured by a plurality of core chips and interface chips. <P>SOLUTION: This semiconductor memory device comprises an interposer chip 110 where a first inner electrode 141 connected to core chips 131 to 134 is formed on a first face 110a. A second inner electrode 142 for connecting to an interface chip and a third inner electrode 143 for connecting to an external terminal are formed on a second face 110b. Since the interface chips can be post-mounted to the second face 110b side of the interposer chip 110, products of different specifications can be produced simply and separately. That is, since appropriate interface chip may be post-mounted, in response to user's demands, it is not necessary to have a large quantity of core chips in a bare-chip state stocked. <P>COPYRIGHT: (C)2007,JPO&INPIT |
