| 摘要 |
<p>An on-chip response adjuster is based on an on-purpose generated and dominant transfer pole or zero of a signal response so as to provide a process-stable phase behavior of the circuitry. The signal response is defined directly by a passive frequency variant component (Lfold) and by transistor operation point, e.g. biasing, of a transistor configuration (Qcas,Qaux). As a result, electrically controlled signal response adjusters can be provided with fully integrated, single-chip integrated or system-on-chip (SoC) techniques.</p> |
