发明名称 APPARATUS FOR RECEIVING PARALLEL DATA AND METHOD THEREOF
摘要 A data reception apparatus adjusts a first clock signal to form an adjustment clock signal, and fetches the data signal in a data buffer (102), using a data signal in accordance with the adjustment clock signal in such a way that a set-up time and a hold time of the data signal are secured for each bit or for each group of parallel data. Then, a read device (103) selects the data of a plurality of bits in the data buffer in chronological order and reads out the selected data as parallel data, in accordance with a second clock signal. The data reception apparatus ensures that data can be received in parallel at high speed whilst retaining synchronism between bits.
申请公布号 KR100669931(B1) 申请公布日期 2007.01.16
申请号 KR20040104244 申请日期 2004.12.10
申请人 发明人
分类号 G06F13/38;G06F1/12 主分类号 G06F13/38
代理机构 代理人
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