| 摘要 |
<p>A fin transistor and a manufacturing method are provided to increase gate channel width and to secure short channel effect margin by using a fin active region having concave sides. A fin active region(64a) is formed. Both sides of the fin active region are concave. A trench mask where a pad oxide layer and a pad nitride layer are stacked is formed on a predetermined region of a semiconductor substrate(61). The semiconductor substrate is selectively etched by using the trench mask as an etch barrier to form a trench. The trench is gap-filled to form an isolation layer(63a). The isolation layer is selectively etched to open the fin active region. Both sides of the fin active region are etched. The isolation layer is formed on both lower sidewalls of the fin active region. A gate dielectric(65) is formed to surround the fin active region. A gate electrode(66) is formed on the isolation layer and the gate dielectric.</p> |
