发明名称 Method to calibrate DRAM Ron and ODT values over PVT
摘要 An embodiment may comprise memory with a memory array, a resistor coupled to a reference voltage, on die termination circuitry coupled with the resistor, and an input coupled to the on die termination circuitry and coupled with the memory array, the input to receive a calibration command to stop use of the input and the memory array and calibrate the on die termination circuitry with the resistor coupled to the reference voltage. Other embodiments are disclosed herein.
申请公布号 US2007007992(A1) 申请公布日期 2007.01.11
申请号 US20050174009 申请日期 2005.06.30
申请人 BAINS KULJIT S;DOUR NAVNEET;FAHMY HANY;VERGIS GEORGE;COX CHRISTOPHER E 发明人 BAINS KULJIT S.;DOUR NAVNEET;FAHMY HANY;VERGIS GEORGE;COX CHRISTOPHER E.
分类号 H03K19/003 主分类号 H03K19/003
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