| 摘要 |
A semiconductor memory device is provided to rapidly stabilize a refresh process by sequentially refreshing plural word lines according to core current consumption rates of the respective word lines. A semiconductor memory device includes plural blocks(300~350), an internal address generator(100), and plural peak current controllers(200~250). Each of the blocks includes a memory cell array. The internal address generator counts addresses and outputs a block select signal for selecting a portion of the blocks, to the blocks. The peak current controllers delay sense amplifier start signals for controlling the operation timing of the sense amplifier, after an active mode, by a predetermined time interval according to the state of a refresh signal, and output the delayed result.
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