A SEMICONDUCTOR DEVICE INCLUDING A VERTICAL DECOUPLING CAPACITOR

摘要

A vertical or three-dimensional non-planar configuration for a decoupling capacitor (240, 340, 440, 540) is provided, which significantly reduces the required die area for capacitors of high charge carrier storage capacity. The non-planar configuration of the decoupling capacitors (240, 340, 440, 540) also provides enhanced pattern uniformity during the highly critical gate patterning process.