发明名称 |
Mechanism to store reordered data with compression |
摘要 |
According to one embodiment a computer system is disclosed. The computer system includes a central processing unit (CPU), a cache memory coupled to the CPU and a cache controller, coupled to the cache memory. The cache memory includes a plurality of compressible cache lines to store additional data. The cache controller reorders a cache line after each access to the cache line prior to the compression of the cache line into a compressed cache line.
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申请公布号 |
US7162583(B2) |
申请公布日期 |
2007.01.09 |
申请号 |
US20030747470 |
申请日期 |
2003.12.29 |
申请人 |
INTEL CORPORATION |
发明人 |
ADL-TABATABAI ALI-REZA;GHULOUM ANWAR M.;LUEH GUEI-YUAN;YING VICTOR |
分类号 |
G06F12/00;G06F12/08;H03M7/30 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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