| 摘要 |
A semiconductor memory device with improved a column selection line and a driving method thereof are provided to prevent the degradation of high speed operation performance, by comprising a hierarchical column selection line by improving the column selection line. In a semiconductor memory device comprising at least one memory cell array and inputting/outputting data synchronously with a reference clock, a first global column selection line(GCSL1) and a second global column selection line(GCSL2) have a first frequency lower than the frequency of the reference clock and transfer a first global column selection signal and a second global column selection signal having a constant phase difference, in order to select a column of the memory cell array. A column selection gate pair(151,152,153,154) is connected between a bit line pair and an input/output line pair, and is connected to a local column selection line(LCSL). A logic operation part(171) performs logic operation of the first global column selection signal and the second global column selection signal, and outputs a local column selection signal having a second frequency higher than the first frequency. The local column selection signal is applied to the gates of the column selection gate pair through the local column selection line.
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