发明名称 Semiconductor integrated circuit, method of manufacturing semiconductor integrated circuit, charge pump circuit, layout designing apparatus, and layout designing program
摘要 A layout capable of placing a circuit constituted by a plurality of transistors in a small-with region is automatically formed. A search section inputs data on a circuit and makes a search for a set of routes formed so that passage through any one of the transistors occurs only one time and so that the combination of routes in one set can cover the entire circuit network. An extraction section extracts a set of routes having the smallest number of routes in sets of route found by searching. A width determination section determines the layout width from the widths of source and drain electrodes of each transistor, the width of the region between the source and drain electrodes, the width of the region between some of the adjacent pairs of the transistors not combined into a common electrode, the number of transistors, and the smallest number of routes. A layout determination section forms information on a layout in which all the source, drain and gate electrodes of the transistor included in the circuit are placed in a small-width region having the determined width.
申请公布号 US2007001196(A1) 申请公布日期 2007.01.04
申请号 US20060517258 申请日期 2006.09.08
申请人 NEC CORPORATION 发明人 NONAKA YOSHIHIRO
分类号 H01L27/10;G06F17/50;H01L21/77;H01L21/82;H01L21/822;H01L21/84;H01L23/528;H01L27/02;H01L27/04;H01L27/12 主分类号 H01L27/10
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