| 摘要 |
A semiconductor device incorporating an alloy layer formed on a substrate; a gate electrode, a source electrode, and a drain electrode formed on the alloy layer at predetermined intervals therebetween; a gate insulating layer formed on the gate electrode in a gate electrode region; a first conductive layer formed on the substrate, including the source electrode and the drain electrode; and a second conductive layer and a metal silicide layer sequentially stacked on the first conductive layer and gate insulating layer.
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