发明名称 SHIFT REGISTER AND ELECTRONIC EQUIPMENT
摘要 <P>PROBLEM TO BE SOLVED: To provide a shift register which can stably operate for a long period of time by preventing fluctuations of transistor characteristics. <P>SOLUTION: This shift register comprises two or more stages RS(1) to RS(n), and each of the stages RS(1) to RS(n) is constituted of six TFTs 1 to 6. In the k-th stage RS(k), the output signal OUTk-1 of the preceding stage (the first stage is supplied with an external start signal Dst) is supplied to the gate of TFT1, and TFT 1 is turned on when the output signal OUTk-1 becomes at high level, and TFTs 2, 5 are turned on and TFT 3 is turned off by outputting a power source voltage Vdd from the drain to the source to accumulate electric charges on a node Ak. Further, TFT 6 is supplied with an output signal OUTk+1 of the next stage RS(k+1) (the n-th stage is supplied with an external end signal Dend), and is turned on when this output signal becomes at high level, to discharge the electric charges accumulated on the node Ak. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006351194(A) 申请公布日期 2006.12.28
申请号 JP20060228509 申请日期 2006.08.25
申请人 CASIO COMPUT CO LTD 发明人 SASAKI KAZUHIRO
分类号 G11C19/28;G02F1/133;G09G3/20;G09G3/36;G11C19/00;H04N5/225;H04N5/335 主分类号 G11C19/28
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