发明名称 Reducing storage data transfer interference with processor power management
摘要 Systems and methods of managing power consumption provide for placing a processor in a non-snoopable state while a storage interface associated with the processor is enabled for bus mastering. In one embodiment, the bus mastering results in traffic between the storage interface and a storage device, where the traffic is monitored and the processor is placed a snoopable state when traffic is moving, and in the non-snoopable idle state if the traffic ceases for a period of time.
申请公布号 US2006294406(A1) 申请公布日期 2006.12.28
申请号 US20050165157 申请日期 2005.06.23
申请人 INTEL CORPORATION 发明人 CLINE LESLIE E.
分类号 G06F1/32 主分类号 G06F1/32
代理机构 代理人
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