发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of preventing abnormal operation due to a user programming error such as reading from an unwritten address of a RAM in actual usage. <P>SOLUTION: When an external reset signal RST is released, an internal reset signal generation part 2 releases an internal reset signal RST_IN. By means of a RAM initialization control part 10, an address generation counter part 11, a data generation part 12, and a WE generation part 13 start operation necessary for initializing RAMs 6-0 and 6-1 and tag RAMs 21-I and 21-D when the internal reset signal RST_IN is released, and a CPU 9 maintains the initial state until initialization of the RAMs 6-0 and 6-1 and the tag RAMs 21-I and 21-D is finished. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2006350889(A) 申请公布日期 2006.12.28
申请号 JP20050178890 申请日期 2005.06.20
申请人 FUJITSU LTD 发明人 TOMATSURI HIDEAKI;IGARASHI TOSHIYUKI;AKASAKA NOBUHIKO
分类号 G06F12/00;G06F1/24 主分类号 G06F12/00
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