发明名称 Data processor including clock thinning-out circuit
摘要 A data processor which may prevent data processing being executed from being analyzed based on the power consumption has been disclosed. A data processor ( 100 ) may include clock generating circuit ( 101 ), a random number generating circuit ( 102 ), a clock thinning-out circuit ( 103 ), and circuit resources ( 105 to 109 ). A clock signal (CLOCK A) may be thinned out by clock thinning out circuit ( 103 ) in correspondence to a random number generated by a random number generating circuit ( 102 ) to provide a clock signal (CLOCK C) to circuit resources ( 105 to 109 ). In this way, correct analysis of data processing being executed based on monitoring power consumption may be prevented.
申请公布号 US7155626(B2) 申请公布日期 2006.12.26
申请号 US20030351130 申请日期 2003.01.24
申请人 NEC ELECTRONICS CORPORATION 发明人 AIKAWA HIROKO
分类号 G06F1/12;G06F12/14;G06F1/04;G06F21/00;G06F21/06;G06F21/22 主分类号 G06F1/12
代理机构 代理人
主权项
地址