| 摘要 |
A receiving apparatus receives data sequences, each of which includes plural data blocks, from plural transmission lines, respectively. The apparatus includes plural elastic buffers and a deskew circuit. The corresponding data sequence is written into each elastic buffer. A predetermined number of consecutive timing control symbols are inserted into the data sequences as markers for data blocks to be read from the data sequences at the same cycle. The elastic buffers adjust numbers of the timing control symbols included in the written data sequences, respectively. The data sequences, in each of which the number of the timing control symbols has been adjusted, are read from the elastic buffers in synchronization with a reading clock. The data sequences are written into the deskew circuit. The deskew circuit adjusts the number of the timing control symbols included in each data sequence so as to be equal to the predetermined number.
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