发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To realize a semiconductor memory device which can perform a read operation at high speed and accurately without increasing a circuit scale. SOLUTION: A sense amplifier has transistors Q1, Q2 switching conduction or interruption of a pair of bit lines BLL, bBLL and a pair of sense nodes SA, bSA, transistors Q3, Q4 switching conduction/interruption of a pair of bit lines BLR, bBLR and a pair of sense nodes SA, bSA, an initial sense circuit 21, transistors Q5 to Q8 constituting a latch circuit 22 performing a latch operation after initial sense, transfer gates TG1 to TG4 controlling rewriting of data for performing controlling refresh, and a transistor Q11 short-circuiting the pair of sense nodes SA and bSA at the time of standby. Since circuit constitution of the sense node SA side and circuit constitution of the sense node bSA are symmetric, correct sense operation can be performed even when data of any logic is read. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006338793(A) 申请公布日期 2006.12.14
申请号 JP20050162828 申请日期 2005.06.02
申请人 TOSHIBA CORP 发明人 FUJITA KATSUYUKI;HATSUDA KOSUKE;OSAWA TAKASHI
分类号 G11C11/409;G11C11/404 主分类号 G11C11/409
代理机构 代理人
主权项
地址