发明名称 RELIABILITY VERIFICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, RELIABILITY VERIFICATION APPARATUS OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND COMPUTER PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a reliability verification apparatus of a semiconductor integrated circuit device performing the reliability verification of electromigration by mean current values, maximum current values and root-mean-square current values with high accuracy and efficiency. SOLUTION: A mean current value is calculated by a mean current calculation part 201 on the basis of a load capacity value and an output through rate, and a maximum current value is calculated by a maximum current calculation part 206 only to acceptable cells having the calculated mean current value that is a permissible mean current value or less. An RMS current value is calculated by an RMS current calculation part 211 only to the acceptable cells having the calculated maximum current value that is the permissible maximum current value or less. Whether the calculated RMS current value is the permissible RMS current value or less is verified, and the violated cells exceeding the permissible value in the verification of the mean current value (and the maximum current value) are excluded from the objects for calculation and verification of the maximum current value (and the RMS current value). COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006339610(A) 申请公布日期 2006.12.14
申请号 JP20050166157 申请日期 2005.06.06
申请人 SHARP CORP 发明人 NAKABAYASHI TAMIYO
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
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