发明名称 Level conversion circuit and semiconductor integrated circuit device employing the level conversion circuit
摘要 In a level conversion circuit mounted in an integrated circuit device using a plurality of high- and low-voltage power supplies, the input to the differential inputs are provided. In a level-down circuit, MOS transistors that are not supplied with 3.3 V between the gate and drain and between the gate and source use a thin oxide layer. In a level-up circuit, a logic operation function is provided.
申请公布号 US2006273825(A1) 申请公布日期 2006.12.07
申请号 US20060484690 申请日期 2006.07.12
申请人 发明人 TANAKA KAZUO;MIZUNO HIROYUKI;NISHIYAMA RIE;MIYAMOTO MANABU
分类号 H03K19/0175 主分类号 H03K19/0175
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