| 摘要 |
A unified memory architecture IP packet processing platform (e.g., IPv4) that is designed to execute on a standard general purpose computer. Unlike the traditional packet processing paradigm, our platform is software pluggable and can integrate all of the functionality that is typically only available by chaining a series of discrete devices. The present invention uses a unified memory architecture that precludes the need to transfer packets between modules that implement processing functionality.
|
