发明名称 DECODER OF DIGITAL-TO-ANALOG CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a decoder of a digital-to-analog converter capable of reducing the number of PMOS and NMOS transistors and a layout area for a metal-contact-poly-structure and also reducing a bump pad pitch. SOLUTION: In the present invention, the gamma voltage selection is controlled by a reduced number of NMOS and PMOS transistors according to the characteristic of the NMOS and PMOS transistor, such that the layout area of the switch array is reduced. Moreover, a N-type buried diffusion (BDN) layer and a P-type buried diffusion (BDP) layer are adopted to replace the contacts in the layout of conventional decoder, such that the layout can be simplified and the bump pad pitch thereof can be decreased. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006332596(A) 申请公布日期 2006.12.07
申请号 JP20060061604 申请日期 2006.03.07
申请人 HIMAX OPTOELECTRONICS CORP 发明人 TSAI CHIH-CHUNG;HUNG KUN-CHENG
分类号 H01L21/822;H01L21/8238;H01L27/04;H01L27/092;H03M1/76 主分类号 H01L21/822
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