THIN FILM TRANSISTOR ARRAY PANEL

摘要

A thin film transistor substrate is provided to reduce the parasitic capacitance between a pixel electrode and a gate line due to a voltage difference generated between a pair of pixel electrodes, by asymmetrically designing the distances between pixel electrodes and adjacent gate lines. A plurality of pixels have a plurality of pixel electrodes(190) and switching elements connected to the pixel electrodes. A plurality of gate lines(121a,121b) are electrically connected to the switching elements, wherein at least two gate lines are assigned to each row of pixel electrodes. A plurality of data lines(171) are electrically connected to the switching elements, wherein one data line is assigned to two columns of pixels. A first distance between one of a pair of pixel electrodes and an adjacent gate line is different from a second distance between the other of the pair of pixel electrodes and an adjacent gate line.