| 摘要 |
An operation method for a memory structure formed between two doping regions serving as bit lines in a semiconductor substrate, the memory structure comprising a first conductive line serving as a select gate and being formed above the semiconductor substrate, two conductive blocks serving as floating gates and being formed at the two sides of the first conductive line and insulated from the first conductive line with two first dielectric spacers therebetween, a first dielectric layer formed on the two second conductive blocks, a selected second conductive line serving as a word line and being formed on the first dielectric layer and substantially perpendicular to the two doping regions, and a plurality of unselected second conductive lines parallel to the selected second conductive line; wherein reading the programmed status of one of the conductive blocks comprising the step of putting a bias voltage on the doping region next to the other conductive block so that the depletion region is created across the other conductive block whereby ignoring the effect of the other conductive block if being programmed, and the unselected second conductive lines are applied by negative voltages.
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