| 摘要 |
<p>A method for forming a gate electrode in a flash memory device is provided to reduce the resistance of the gate electrode by forming an electrode layer with a relatively wide width on a gate line. A stacked gate line(105) including a tunnel oxide layer, a first polysilicon layer, a dielectric film, and a second polysilicon layer is formed on a semiconductor substrate(100). An insulating layer(108) is formed at a space between the gate lines. A gate electrode(109) is then formed on the gate line, wherein the width of the gate electrode is wider than that of the gate line.</p> |
