发明名称 INTEGRATED CIRCUIT CHIP HAVING A FIRST DELAY CIRCUIT TRIMMED VIA A SECOND DELAY CIRCUIT AND METHOD FOR ADJUSTING A DELAY TIME
摘要 A method for adjusting delay time, and an integrated circuit chip comprising a first delay circuit trimmed via a second delay circuit are provided to adjust a second delay and a first delay on the basis of an oscillating signal, by trimming the first delay circuit. In an integrated circuit chip(24), a first delay circuit(28) has a first delay circuit topology configured to delay a signal by a first delay. A second delay circuit(30) has a second delay circuit topology configured to provide an oscillating signal and a second delay in a circuit loop configured to be monitored. The second delay circuit topology is actually equal to the first delay circuit topology, and the first delay circuit is configured to be trimmed in order to adjust the first delay on the basis of the second delay and the oscillating signal.
申请公布号 KR20060121711(A) 申请公布日期 2006.11.29
申请号 KR20060045957 申请日期 2006.05.23
申请人 INFINEON TECHNOLOGIES AG 发明人 SCHNELL JOSEF;STAHL ERNST
分类号 G11C8/00;G11C11/407 主分类号 G11C8/00
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