| 摘要 |
A video signal processing circuit for processing a video signal inputted from an image sensor capable of reading pixels by means of pixel-thinning read or pixel-mixing read in addition to all-pixel read according to the present invention comprises a signal processor in a former stage for converting the video signal inputted from the image sensor into a digital image data, a temporary memory for horizontal flip for temporarily memorizing the digital image data outputted from the signal processor in the former stage and outputting the memorized image data in such a manner that the image data is horizontally flipped on an image, a signal processor in a latter stage for signal-processing the digital image data outputted from the temporary memory for horizontal flip, and a clock generator for supplying a clock signal to the signal processor in the former stage and the temporary memory for horizontal flip and supplying a clock signal having a clock rate lower than that of the clock signal to the signal processor in the latter stage.
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