发明名称 Crack stop trenches in multi-layered low-k semiconductor devices
摘要 A method is provided for fabricating a semiconductor device. The method begins by forming on a substrate an interconnect stack layer that includes a plurality of layers with interconnecting metal overlying the substrate. After forming the interconnect stack layer, a crack stop trench is formed in the interconnect stack layer. Finally, the crack stop trench is filled with a prescribed material.
申请公布号 US2006264035(A1) 申请公布日期 2006.11.23
申请号 US20050135313 申请日期 2005.05.23
申请人 NOGAMI TAKESHI 发明人 NOGAMI TAKESHI
分类号 H01L21/4763 主分类号 H01L21/4763
代理机构 代理人
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