| 摘要 |
An analog semiconductor integrated circuit has an analog circuit, a PMOS and a bias adjustment circuit. The gate of the PMOS is the output section of an open drain system, and is connected to an internal node on the output side of the analog circuit. The bias adjustment circuit is connected to the internal node, and allows adjustment of the bias current in accordance with the fuse disconnection number. The relationship between the voltage when a fixed current flows to an input terminal and the fuse disconnection number that allows the optimum bias current to flow to the output section of the analog LSI is checked by using a plurality of sample analog LSIs having different threshold voltages. The voltage is measured by causing a fixed current to flow to the input terminal of a non-sample analog LSI, and the fuse disconnection number corresponding with this voltage is obtained. Thus, the fuses in the bias adjustment circuit are disconnected.
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