| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a reset method for a digital signal processor, capable of preventing generation of abnormal reset release caused by abnormality of a voltage waveform of a reset signal received by a reset terminal by various kinds of circuit abnormality with a simple method. <P>SOLUTION: A reset signal decoding circuit 7 of a signal processing circuit 1 instructs the reset release to a program arithmetic circuit (a routine execution circuit) 5 of the signal processing circuit 1 when a reset release signal is inputted to the reset terminal 6, and instructs a reset to the program arithmetic circuit (the routine execution circuit) 5 of the signal processing circuit 1 when the reset signal is inputted to the reset terminal 6. The reset signal decoding circuit 7 decides a pulse signal as the reset release signal when the pulse signal of a prescribed form is inputted to the reset terminal, and regards the reset terminal voltage waveform except it as the reset signal. Thereby, a reset state of the program arithmetic circuit 5 is not released even when the reset voltage waveform becomes abnormal (e.g. potential fixing) not to erroneously start, so that an erroneous signal is not outputted to the outside. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
